Study of test quality improvement with Iddq testing
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This project was a continuation of the autumn project named ?Iddq Analysis? . The assignment by Atmel Norway was given to examine the reliability and fault types in ?Iddq only? circuits. This project started with a theoretical study of Iddq analysis, diagnostic methods, and editing of production programs to gather circuits with ?Iddq only? faults from production. Production test of two lots gave 225 circuits that failed only the Iddq test. The Iddq-V ?current-voltage? characteristics were in the diagnostic tests implemented to determine different Iddq-V curve shapes. Four different Iddq-V characteristics were found in the 50 HTOL devices. The device lifetime was simulated in ?High Temperature Operation Life? for 1000 hours in 150oC, to study the circuit reliability. Twelve of 50 units were sensitive to HTOL stress and altered the Iddq current after the HTOL stress. Five Iddq only circuits failed the production test after high temperature stress. Four of the failures were current consumption tests in power down. The other failure was a self-test fault. Atmels physical analysis lab in California analysed eight devices with ?Iddq only? faults. Devices were ?decaped?, analysed with the emission microscope to see where the Iddq currents flowed, and deprocessed in the Iddq current hot spot, to find the physical defect. The physical analysis detected two devices with processing bridging faults, one device had holes in the silicon layer and the other devices had no visible faults.